About OpTiMSoC
Motivation
Tiled manycore System-on-Chip have become a common way to integrate tens or even hundreds of processor cores in future processing platforms. To research and measure enhancements of such platforms a basline system is necessary, ideally at different configurations. As many researches do not have such a system at hand, they are often restricted to (system level) simulation or need to build such a complex system from scratch.
Goal
The goal of OpTiMSoC is to create a freely available, open source framework for research on manycore System-on-Chip. By providing basic blocks, such as a Network-on-Chip in different configurations, processing elements (CPU cores), hardware accelerators, and I/O modules creating a new SoC is a matter of plugging the different components together. The resulting hardware can then be simulated on a PC, e.g. in ModelSim, or synthesized and run on an FPGA.
On top of the hardware components, a basic runtime library (“operating system”) as well as a trace-based debug and diagnosis infrastructure enable rapid prototyping.
It is not a goal to create a complete and optimized SoC design for production.
A summarizing (and citable) paper can be found at arXiv:1304.5081.
Contact
If you have questions, suggestions or anything else related to OpTiMSoC, please contact Stefan Wallentowitz by mail.
License
Most of OpTiMSoC is open source and licensed under the MIT license. This essentially means (see the appropriate licenses for details and the only authoritative text):
You can
- freely use OpTiMSoC
- freely modify OpTiMSoC
- freely distribute any derived work of OpTiMSoC even for closed source or commercial applications
You should
- be a nice person and contribute your changes back!
Please note that some code is licensed under the GPLv3+ (where necessary due to the usage of certain external libraries) or other open-source licenses. A notable example for this is the OpenRISC processor core, which is licensed under LGPLv2 (OR1200) or OHDL (mor1kx, OHDL is an MPLv2-derived license with file-based copyleft and no patent clause). Other code might be even more restricted when third-party code was integrated. This is especially true for generated code for FPGA targets, which can usually only be used with the corresponding hardware. (You cannot use Xilinx-generated code on an Altera FPGA for example.) Please be careful, read license headers of the source files and ask a lawyer if in doubt.
The people behind OpTiMSoC
OpTiMSoC was developed mainly by a research group at the Lehrstuhl für Integrierte Systeme (Institute for Integrated Systems) at the Technische Universität München (TUM). We used it there for our research on new manycore System-on-Chip architectures. The project started in 2011 and up to now many researchers and students have contributed to it. Today it is still maintained by us after graduation.
Stefan Wallentowitz
Stefan started the project in 2011 and is probably the only person who knows every corner of OpTiMSoC by heart.
Philipp Wagner
Philipp joined in 2012 and is mainly working on the debug and diagnosis infrastructure.
Max Koenen
Max first joined the OpTiMSoC team in 2014 for a research practice. Since 2016 he also works at LIS where he researches fault-tolerant Network on Chips for safety-critical real-time systems. Contact him by mail at max.koenen@tum.de.Many others!
The people listed here are just some who contributed to OpTiMSoC. In total around 30 people contributed in some form, most of them students doing their Bachelor's or Master's thesis.